AND Gate Example

New format available! This reference is now available in a new format that offers faster page load, improved display for calculations and images and more targeted search.

As of January 2024, this Reliawiki page will not continue to be updated. Please update all links and bookmarks to the latest references at BlockSim examples and BlockSim reference examples.

---

This example also appears in the System analysis reference.

AND Gate

In an AND gate, the output event occurs if all input events occur. In system reliability terms, this implies that all components must fail (input) in order for the system to fail (output). When using RBDs, the equivalent is a simple parallel configuration.

Example

Consider a system with two components, A and B. The system fails if both A and B fail. Draw the fault tree and reliability block diagram for the system. The next two figures show both the FTD and RBD representations.

The reliability equation for either configuration is:

[math]\displaystyle{ {{R}_{System}}={{R}_{A}}+{{R}_{B}}-{{R}_{A}}\cdot {{R}_{B}}\,\! }[/math]

The figure below shows the analytic equation from BlockSim.