AND Gate: Difference between revisions

Latest revision as of 16:59, 25 June 2015

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-This page describes the AND gate and it's applications in Fault Tree diagrams used in Reliability and Safety Engineering.
+#REDIRECT [[Fault_Tree_Diagrams_and_System_Analysis]]
-In an AND gate, the output event occurs if all input events occur (or event A AND event B AND event C).  When used in reliability and safety engineering an event is usualy a failure, a failure mode, or other undesirable event.
-If one is looking at system reliability with each event represnting a component of the system then this this implies that all components must fail (input) in order for the system to fail (output).  When using RBDs, the equivalent is a simple parallel configuration.
-[[File:andgate.png|center]]
-=System Reliability Example=
-Consider a system with two components,  ''A''  and ''B''.  The system fails if both  ''A''  and ''B'' fail.  Then the fault tree diagram is an AND gate (represinting the system level) with two events ''A''  and ''B''. This is shown in the next figure.
-[[File:I10.2.gif|center]]
-The reliability equation for either configuration is:
-<br>
-::<math>{{R}_{System}}={{R}_{A}}+{{R}_{B}}-{{R}_{A}}\cdot {{R}_{B}}</math>