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| This page describes the AND gate and it's applications in Fault Tree diagrams used in Reliability and Safety Engineering.
| | #REDIRECT [[Fault_Tree_Diagrams_and_System_Analysis]] |
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| In an AND gate, the output event occurs if all input events occur (or event A AND event B AND event C). When used in reliability and safety engineering an event is usualy a failure, a failure mode, or other undesirable event.
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| If one is looking at system reliability with each event represnting a component of the system then this this implies that all components must fail (input) in order for the system to fail (output). When using RBDs, the equivalent is a simple parallel configuration.
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| [[File:andgate.png|center]] | |
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| =System Reliability Example=
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| Consider a system with two components, ''A'' and ''B''. The system fails if both <math>A</math> and <math>B</math> fail. Draw the fault tree and reliability block diagram for the system. The next two figures show both the FTD and RBD representations.
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| <br>
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| [[File:I10.2.gif|center]]
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| [[File:I10.3.gif|center]]
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| <br>
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| <br>
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| The reliability equation for either configuration is:
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| <br>
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| ::<math>{{R}_{System}}={{R}_{A}}+{{R}_{B}}-{{R}_{A}}\cdot {{R}_{B}}</math>
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